DFT (Design for Test) Engineer

Job Description Job Description Job title: DFT Engineer Location: Santa Clara, California • 5 years of hands-on experience in DFT and ATPG for SoC or ASIC designs • Strong understanding of DFT fundamentals including controllability, observability, and scan-based testing • Proven expertise in ATPG pattern generation, analysis, and debug • Experience with MBIST, including memory test architectures and diagnostics • Knowledge of IO Test methodologies for interface and pin level validation • Solid …